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AI Inference IP Core
Parallel inference at the edge — deterministic, quantised, portable.
Overview
A parallel-compute IP core for running quantised neural networks on FPGA or ASIC. Built for vision, sensor fusion, and on-orbit inference.
Our AI Inference IP Core is designed for workloads where GPUs are too power-hungry and general-purpose NPUs are too opaque. It runs INT8 / INT4 quantised networks with deterministic latency, ports cleanly from FPGA prototype to ASIC tape-out, and is verifiable end-to-end.
What's included
Features
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Parameterised RTL
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Reference compiler for an ONNX subset
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FPGA reference design
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Integration guide & testbench
Spec sheet
At a glance
InterfaceAXI4 / AXI-Stream
PrecisionINT8 / INT4
TargetsXilinx UltraScale+, Intel Agilex, 28nm ASIC
VerificationUVM testbench included
Full numbers, gate counts, and target-node performance disclosed under NDA.
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