RisingCompute designs parallel hardware architectures and IP cores for AI, space, and robotics. The founders met in the SSPACE lab at IIST — and brought the same standards out into the open.
RisingCompute began in 2026 inside the SSPACE lab at IIST, where our founding team spent two years building computation systems for satellites — IP that has since flown in space.
Working at that level taught us something simple: the difference between what a research team can do with AI and what most engineers and companies can do comes down to the compute they have access to. We started RisingCompute to close that gap. By building parallel hardware architectures and reusable IP cores, we make accelerated compute scalable and easy to integrate — so an aerospace OEM, a robotics startup, or a defense electronics lab can get research-grade performance without rebuilding the stack from scratch.
Every founder owns a clear technical domain. Together we cover system architecture down to silicon.
Co-founder · VLSI & Robotics Engineer
RTL / FPGA design · robotics control hardware · motion and sensor-fusion blocks
Hardware designer specialising in RTL and FPGA for robotics and motion systems. At SSPACE, IIST, contributed to onboard compute blocks for satellite payloads and now leads RisingCompute's communication-protocol and robotics IP work.
Co-founder · VLSI & AI Engineer
RTL / FPGA design · quantised neural-network accelerators · verification
VLSI engineer focused on AI accelerator architectures and verification. At SSPACE, IIST, designed and verified compute IP that has flown in space; at RisingCompute, leads the AI Inference IP Core and the Cybersecurity IP Core.
Co-founder · System Engineer & Project Manager
System architecture · integration · project delivery · GTM
Systems engineer and programme lead. Brings the IP, the engineering team, and the customer programme together — sets architecture, owns project delivery, and runs partner and customer conversations.
We measure things. We ship blocks. We don't hide behind roadmaps.
Verification-first. Documentation that an integrator can actually use.
Designed for orbits and factory floors — robustness is the baseline, not a feature.
Primary office and engineering team.
Space Technology Incubation & Innovation Cell, IIST.
Founded 2026. Three IP cores in customer-ready testing.
